Pin

Name

Dir.

Domain

JBD-50

Function

J5.3

+5 V (ENC Y)

output

Logic

J2 · 3

Encoder Y supply, fused 0.25 A

J5.4

GND

—

Logic

J2 · 4

Encoder Y supply return, logic ground

J5.5

ENC Y A+

input

Logic

J2 · 5

Axis Y encoder A, non-inverting

J5.6

ENC Y A−

input

Logic

J2 · 6

Axis Y encoder A, inverting

J5.7

ENC Y B+

input

Logic

J2 · 7

Axis Y encoder B, non-inverting

J5.8

ENC Y B−

input

Logic

J2 · 8

Axis Y encoder B, inverting

J5.9

ENC Y Z+

input

Logic

J2 · 9

Axis Y encoder index, non-inverting

J5.10

ENC Y Z−

input

Logic

J2 · 10

Axis Y encoder index, inverting

J5.21

+5 V (ENC X)

output

Logic

J3 · 9

Encoder X supply, fused 0.25 A

J5.22

GND

—

Logic

J3 · 10

Encoder X supply return, logic ground

J5.23

ENC X A+

input

Logic

J3 · 11

Axis X encoder A, non-inverting

J5.24

ENC X A−

input

Logic

J3 · 12

Axis X encoder A, inverting

J5.25

ENC X B+

input

Logic

J4 · 1

Axis X encoder B, non-inverting

J5.26

ENC X B−

input

Logic

J4 · 2

Axis X encoder B, inverting

J5.27

ENC X Z+

input

Logic

J4 · 3

Axis X encoder index, non-inverting

J5.28

ENC X Z−

input

Logic

J4 · 4

Axis X encoder index, inverting

J5.39

+5 V (CONTROL)

output

Logic

J5 · 3

Analog / pull-up supply, fused 0.25 A

J5.40

GND

—

Logic

J5 · 4

Control supply return, logic ground

J5.41

PULSE X

output

Logic

J5 · 5

Axis X step pulse

J5.42

DIR X

output

Logic

J5 · 6

Axis X direction

J5.43

ENABLE X

output

Logic

J5 · 7

Axis X drive enable

J5.44

AIN1

input

Logic

J5 · 8

Analog input 1, 0–5 V

J5.45

PULSE Y

output

Logic

J5 · 9

Axis Y step pulse

J5.46

DIR Y

output

Logic

J5 · 10

Axis Y direction

J5.47

ENABLE Y

output

Logic

J5 · 11

Axis Y drive enable

J5.48

AIN2

input

Logic

J5 · 12

Analog input 2, 0–5 V

Pins not listed are not connected: 1–2, 11–20, 29–38, 49–50.